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A 40 ns random access time low voltage 2Mbits EEPROM memory for embedded applications

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6 Author(s)

2Mbits EEPROM memory has been designed using the ATMEL 0.18 μm embedded technology. On silicon program and read access time measurements are given, and an optimized production testing flow is proposed.

Published in:

Memory Technology, Design and Testing, 2003. Records of the 2003 International Workshop on

Date of Conference:

28-29 July 2003