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Rapid prototyping for an optimized MPEG4 decoder implementation over a parallel heterogeneous architecture

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4 Author(s)
Ventroux, N. ; INSA, CNRS, Rennes, France ; Nezan, J.F. ; Raulet, M. ; Deforges, O.

Sequential Mpeg-4 solutions actually developed for single processors try to integrate the most functionalities as possible in an unique software, and are generally oversized compared with the actual service requirement. Moreover, they can hardly be projected onto multiprocessors targets, leading to an extra load of source code and calculations, but also to a sub-optimal use of the architecture parallelism. This paper introduces a distributed Mpeg-4 application, where the system part is hosted by a standard PC, and the video decoder is supported by a multi-DSPs board. In particular, we present our AVSynDEx methodology allowing both an incremental building, an easy update on the video decoder description, and a quasi-automatic implementation onto a multi-C6x platform. We also define a global scheduler managing the parallel execution of the video and system applications.

Published in:

Multimedia and Expo, 2003. ICME '03. Proceedings. 2003 International Conference on  (Volume:3 )

Date of Conference:

6-9 July 2003