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13.5-mW, 5-GHz WLAN, CMOS frequency synthesizer using a true single phase clock divider

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4 Author(s)
Pellerano, S. ; Dipt. di Elettronica e Inf., Politecnico di Milano, Italy ; Samori, C. ; Levantino, S. ; Lacaita, A.L.

An integrated 5 GHz frequency synthesizer consuming only 5.4 mA from a 2.5 V supply is demonstrated in 0.25 /spl mu/m CMOS technology. The divider within the synthesizer employs the True Single Phase Clock logic. The output frequency spans from 5.14 to 5.70 GHz, with steps of 20 MHz. The reference spurs are -70 dBc and the phase noise is lower than -116 dBc/Hz at 1 MHz offset over the whole tuning range. The synthesizer is suitable for the HiperLAN II and the IEEE 802.11a standards.

Published in:

VLSI Circuits, 2003. Digest of Technical Papers. 2003 Symposium on

Date of Conference:

12-14 June 2003

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