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Impacts of high modulus ultra low-k/Cu 300 mm-wafer integration for 65 nm technology node and beyond

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22 Author(s)
Sone, S. ; Res. Dept., Semicond. Leading Edge Technol. Inc., Tsukuba, Japan ; Ohashi, N. ; Shin, H.J. ; Misawa, K.
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A robust low-k material (k<2.3)/Cu multilevel interconnects are integrated using optimized 300 mm-wafer processes for 65 nm node and beyond. Hybrid-structure low-k ILD of porous MSQ (k=2.3)/fluorinated-arylene (F.A., k=2.2) films reduces the effective k value (keff) to 2.6 and sh6ws good electrical characteristics. Improved mechanical properties of low-k materials (Modulus /spl sim/10 GPa) greatly increase a process compatibility with 300 mm-wafer manufacturing technology such as low pressure CMP and plasma treatments during low-k integration.

Published in:

VLSI Technology, 2003. Digest of Technical Papers. 2003 Symposium on

Date of Conference:

10-12 June 2003