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Video compression hardware implementation using programmable media processor

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2 Author(s)
Kratochvil, T. ; Inst. of Radio Electron., Brno Univ. of Technol., Czech Republic ; Fryza, T.

The contribution deals with the real time hardware implementation of the video compression algorithms. The real time media TM-1300 IREF PCI bus board used for research and education in Laboratory of television technique and video technique FEEC BUT is introduced. The different standards used for coding audio-visual information in a digital compressed format are presented in this paper too. Besides the MPEG family standards and the wavelet-based compression, the 3D-DCT transform is outline as well.

Published in:

Video/Image Processing and Multimedia Communications, 2003. 4th EURASIP Conference focused on  (Volume:1 )

Date of Conference:

2-5 July 2003