Close category search window
 

Porous low k pore sealing process study for 65 nm and below technologies

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

13 Author(s)

65 nm and below technologies will require a combination of porous ultra low k dielectric and copper metallization. Feature size may need the use of conformal metallic barrier deposition methods like CVD or ALD. One of the key issues for integration of such materials come from the tendency for precursor to diffuse through the porous structure degrading effective k value. Various pore sealing methodologies were already investigated and reported. In this paper, we describe a process based on the deposition of a thin dielectric liner that allows sealing of surface pores without impacting too much dielectric properties of ULK material. Physico-chemical analysis were carried out and confirmed by electrical measurements.

Published in:
Interconnect Technology Conference, 2003. Proceedings of the IEEE 2003 International

Date of Conference: 2-4 June 2003

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.