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High-energy tail electrons as the mechanism for the worst-case hot-carrier stress degradation of the deep submicrometer N-MOSFET

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4 Author(s)
Ang, D.S. ; Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore ; Phua, T.W.H. ; Liao, H. ; Ling, C.H.

Experimental evidence, based on sensitively modulating the concentration of the high-energy tail of the electron energy distribution, reveals an important trend in the mid-to-high gate stress voltage (V/sub g/) regime, where device degradation is seen to continuously increase with the applied V/sub g/, for a given drain stress voltage V/sub d/. The shift in the worst-case degradation point from V/sub g//spl ap/V/sub d//2 to V/sub g/=V/sub d/, depicting an uncorrelated behavior with the substrate current, is caused by the injection of the high-energy tail electrons into the gate oxide, when the oxide field near the drain region becomes increasingly favorable as V/sub g/ approaches V/sub d/. This letter offers an improved framework for understanding the worst-case hot-carrier stress degradation of deep submicrometer N-MOSFETs under low bias condition.

Published in:

Electron Device Letters, IEEE  (Volume:24 ,  Issue: 7 )

Date of Publication:

July 2003

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