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System-level power-aware design techniques in real-time systems

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2 Author(s)
O. S. Unsal ; Electr. & Comput. Eng. Dept., Univ. of Massachusetts, Amherst, MA, USA ; I. Koren

Power and energy consumption has recently become an important issue and consequently, power-aware techniques are being devised at all levels of system design; from the circuit and device level, to the architectural, compiler, operating system, and networking layers. In this paper, we concentrate on power-aware design techniques for real-time systems. While the main focus is on hard real-time, soft real-time systems are considered as well. We start with the motivation for focusing on these systems and provide a brief discussion on power and energy objectives. We then follow with a survey of current research on a layer-by-layer basis. We conclude with illustrative examples and open research challenges. This paper provides an overview of power-aware techniques for the real-time system engineer as well as an up-to-date reference list for the researcher.

Published in:

Proceedings of the IEEE  (Volume:91 ,  Issue: 7 )