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On-line testable decimation filter design for AMS systems

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3 Author(s)
Naal, M.A. ; TIMA Lab., Grenoble, France ; Simeu, E. ; Mir, S.

This paper presents an implementation of on-line testing techniques for the case of a decimation filter. The decimation filter is used in a ΣΔ analogue-to-digital converter that is in turn used in a built-in-self-test (BIST) circuitry for mixed-signal core testing. Thus, the filter itself must be self-testable. Three different one-line self-test techniques are studied and compared for a 0.18 μm CMOS technology. The first one uses a non-concurrent structural test technique and the others are both based on semi-concurrent test methodologies. In all cases, the on-line test circuitry is automatically synthesized and exploits the idle time of the functional units to apply either a structural or a functional test.

Published in:

On-Line Testing Symposium, 2003. IOLTS 2003. 9th IEEE

Date of Conference:

7-9 July 2003

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