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High-performance crossbar design for system-on-chip

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1 Author(s)
Wijetunga, P. ; Dept. of Electr. Eng., Southern California Univ., Los Angeles, CA, USA

A new low-swing pass-transistor logic style for designing high-performance crossbar switches for system-on-chip applications is proposed. The new pass-transistor architecture uses current-switching and end-to-end swing restoration to improve the crossbar performance. The architecture is verified in 0.35 and 0.25 μm CMOS technology. The 4-b 4x4 crossbar switch in 0.35 μm CMOS occupied an area of 1.4 μm2 and achieved 36 Gb/s. Analysis suggests that the new logic style can be used to design multi-Tb/s crossbar switches in 0.18 μm and lower CMOS technology.

Published in:
System-on-Chip for Real-Time Applications, 2003. Proceedings. The 3rd IEEE International Workshop on

Date of Conference: 30 June-2 July 2003

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