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Wafer level packaging (WLP) techniques have been used to integrate state of the art high Q on-chip inductors on top of a five-levels-of-metal (5LM) Cu damascene back-end of line (BEOL) silicon process using 20 /spl Omega/.cm Si wafers. The inductors are realized above passivation using thick post-processed low-K dielectric (BCB) and Cu layers. For a BCB/Cu-thickness of 16 /spl mu/m/10 /spl mu/m, a peak Q-factor of 34 at 4.3 GHz has been obtained for a 1 nH inductor (substrate contacts present at both ports) with a resonance frequency of 29 GHz; the Q-factor further tops 30 over the 2.1-5.4 GHz frequency range. If a substrate contact is present at only 1 port, Q/sub max/ increases to 38 at 4.7 GHz. Patterned polysilicon ground shields further improve this performance: a Q-factor increase of 90% is demonstrated at 7 GHz for a 2.25 nH inductor. A good agreement between measurements and 3-D simulations is demonstrated.