By Topic

An SNS technology process for ramp junction based digital superconducting circuits

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
D. Hagedorn ; Phys. Tech. Bundesanstalt, Braunschweig, Germany ; M. Khabipov ; R. Dolata ; F. -I. Buchholz
more authors

The SNS (Nb/HfTi/Nb) ramp junction technology process has been improved for digital superconducting circuit operation. DC interferometers were realized on an isolated superconducting ground plane, connections being realized through windows in the insulation layers. The inductances of superconducting Nb striplines (widths w down to the sub-μm range) were measured. For a 250 nm SiO2/Nb-oxide insulation layer, the sheet inductances of striplines were determined at 0.382 ± 0.009, 0.340 ± 0.005, and 0.293 ± 0.008 pH (stripline widths: 1.5, 1.0, 0.54 μm) and compared with data calculated by different inductance evaluation programs. The Josephson junctions used in the interferometers exhibit a critical current density of jC=525 kA/cm2 and a characteristic voltage of VC=95 μV. The design of an RSFQ converter circuit was developed on the basis of SNS ramp junction technology. For circuit applications the critical current density jC was set to 150 kA/cm2.

Published in:

IEEE Transactions on Applied Superconductivity  (Volume:13 ,  Issue: 2 )