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Demonstration of decimation filter and high-speed testing of a component of the filter

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5 Author(s)
A. Sekiya ; Dept. of Inf. Electron., Nagoya Univ., Japan ; M. Tanaka ; A. Akahori ; A. Fujimaki
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We study decimation filters based on the single-flux-quantum circuit in order to realize over-sampled AD converter. We designed the decimation digital filters using CONNECT cells, a well-developed cell library. We designed a T1 cell, because the T1 cell is the key for the counting-type decimation filter. We confirmed correct operation up to 43 GHz by using an on chip test system. Using the T1 cell, we designed second-order counting-type decimation sinc filters with decimation factors N=2 and N=4. The circuit scale was as high as 2758 junctions. We also confirmed the correct operation of these filters.

Published in:

IEEE Transactions on Applied Superconductivity  (Volume:13 ,  Issue: 2 )