Skip to Main Content
First-in, first-out (FIFO) buffers load and unload data using separate clocks that may be incoherent. We explore the application of FIFOs to circular shift registers, serial memory, and data re-clocking. We describe two different FIFO implementations in RSFQ. One employs classic handshaking using the Muller C-element. The other employs physical back-pressure based on repulsion of stored single flux quanta in a JTL. Both implementations use seven Josephson junctions, and a single bias resistor, per cell. The bias resistor can be reduced to an arbitrarily low value, thereby eliminating static power dissipation.