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Dependence of CMOS performance on silicon crystal orientation of , , and  has been investigated with the equivalent gate dielectric thickness less than 3 nm. Hole mobility enhancement of /spl ges/160% has been observed for both oxynitride and HfO/sub 2/ gate dielectrics on  surfaces compared with . CMOS drive current is nearly symmetric on  orientation without any degradation of subthreshold slope. For HfO/sub 2/ gate dielectrics, an approximately 68% enhancement of pMOSFET drive current has been demonstrated on  substrates at L/sub poly/=0.12 /spl mu/m, while current reduction in nMOS is around 26%.