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An improved GaAs device model for the simulation of analog integrated circuit

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4 Author(s)
Matsunaga, N. ; Device Dev. Center, Hitachi Ltd., Tokyo, Japan ; Yamamoto, M. ; Hatta, Y. ; Masuda, H.

This paper describes an improved device model of GaAs MESFETs and heterojunction FETs for the design and analysis of analog integrated circuits. The proposed device model provides a new expression for the current and the capacitance of the device,which gives excellent agreements with experimental data for all regions of device operation. For the expression of the low frequency anomalies of GaAs devices, an improved technique with an equivalent circuit are presented to model the frequency dispersion of the transconductance and the drain conductance of the device, which give a good agreement with the experimental data of both the frequency dispersion and the lag effect of the device. The new device model proposed here clearly provides a superior prediction of the performance of GaAs analog integrated circuit.

Published in:

Electron Devices, IEEE Transactions on  (Volume:50 ,  Issue: 5 )