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On-chip debug support for embedded Systems-on-Chip

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1 Author(s)
Maier, K.D. ; Dept. of Electron., Kent Univ., Canterbury, UK

This paper presents an on-chip hardware architecture to support application software development for embedded Systems-on-Chips (SoC). This architecture provides debug support for one manufacturer's complete SoC platform. This includes a significant number of 16-bit and 32-bit microcontroller and DSP cores, spanning a multitude of application specific systems ranging from wireless systems to engine controllers. The debug support architecture is modular and can be divided into three main components: i) processor-specific debug resources, ii) a serial communication interface to connect the SoC with a debug host computer system and iii) a number of interconnection links to communicate between the serial communication interface and the processor debug resources. This modular approach allows the debug support architecture to be adapted to almost any system configuration (including multiple processor cores), while keeping the impact on silicon real estate for production devices at a minimum.

Published in:

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on  (Volume:5 )

Date of Conference:

25-28 May 2003