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Analysis of output ripple in multi-phase clocked charge pumps

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2 Author(s)
Pylarinos, L. ; Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada ; Phang, K.

This paper presents a mathematical analysis of the ripple voltage caused by a mismatch in parasitic capacitances in multi-phase, clocked charge pumps. Through detailed circuit modeling, we show that a relatively large pedestal ripple is caused by a small mismatch in parasitic capacitance. We present a simple circuit solution and verify its performance with simulation and experimental results using a 0.35 μm CMOS process.

Published in:

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on  (Volume:5 )

Date of Conference:

25-28 May 2003