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Novel recharge semi-floating-gate CMOS logic for multiple-valued systems

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4 Author(s)
Berg, Y. ; Dept. of Inf., Oslo Univ., Norway ; Aunet, S. ; Minnotahari, O. ; Hovin, M.

In this paper we present novel recharged logic for multiple-valued (MV) systems by utilizing semi-floating-gate (SFG) transistors. The recharged multiple-valued logic can be used to implement low-power digital circuits. The improvement in power dissipation is mainly in reduced dynamic power dissipation. The main purpose is to level out the power dissipated by a digital system to obtain more suitable logic for mixed mode design.

Published in:

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on  (Volume:5 )

Date of Conference:

25-28 May 2003