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Area-effective FIR filter design for multiplier-less implementation

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3 Author(s)
Tay-Jyi Lin ; Dept. of Electron. Eng., Nat. Chiao Tung Univ., Taiwan ; Tsung-Hsun Yang ; Chein-Wei Jen

The hardware complexity of digital filters is not controllable by straightforwardly rounding the coefficients to the quantization levels. In this paper, we propose an effective alternative that distributes a pre-defined addition budget to the multiplier-less FIR filters, which takes into account the common sub-expression sharing inside the computations. We successfully integrate a heuristic common sub-expression elimination (CSE) algorithm and the coefficient quantization by successive approximation proposed by Li et al. Besides, we also propose an improved search algorithm for an optimal scale factor to settle the coefficients collectively into the quantization space. Simulation results show that CSE effectively reduces 29. 1%∼31.5% budgets for comparable filter responses. Besides, the improved scale factor exploration helps to find an identical or a better (never worse) quantization result with only 32.67%∼44.53% run time, whether or not CSE is applied.

Published in:

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on  (Volume:5 )

Date of Conference:

25-28 May 2003