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Conflict-free parallel memory access scheme for FFT processors

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3 Author(s)
Takala, J.H. ; Tampere Univ. of Technol., Finland ; Jarvinen, T.S. ; Sorokin, H.T.

In this paper, a parallel access scheme for constant geometry FFT algorithms is proposed, which allows conflict-free access of operands distributed over parallel memory modules. The scheme is a linear transformation and the address generation is performed with the aid of bit-wise XOR operations. Different FFT lengths can be supported with the aid of a simple address rotation unit. The scheme is general supporting several radices in FFT computations and different numbers of parallel memory modules. The scheme allows parallel butterfly computations independent of the FFT length.

Published in:

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on  (Volume:4 )

Date of Conference:

25-28 May 2003