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A 1.8V, 2.4GHz CMOS on-chip impedance matching low noise amplifier for WLAN applications is presented. Its input and output are all matched to 50ohms without any off-chip components. The low noise amplifier could work in two modes: high gain and low gain, the gain could be controlled to get better signal-to-noise ratio performance. The amplifier has been implemented in 0.18μm CMOS process. The measured results show that the amplifier achieves 4.0dB noise figure, 12.0dB power gain, -13dBm input 1dB compression point and -2dBm third-order input intercept point, while drawing 7.94mA current from a 1.8V power supply (high gain mode) or -11.5dB power gain with almost no current consumption (low gain mode). The die area is only 0.97 × 0.88 mm2.
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on (Volume:2 )
Date of Conference: 25-28 May 2003