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Configurable preamble synchronizer for slotted random access in W-CDMA applications

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4 Author(s)
Chi-Fang Li ; Inst. of Electr. Eng., Nat. Chung Cheng Univ., Chia-Yi, Taiwan ; Wern-Ho Sheen ; Fu-Chang Chuang ; Yuan-Sun Chu

This paper proposes a configurable preamble synchronizer based on a generic correlating-element (CE) array for slotted random access in the 3GPP W-CDMA/FDD (3rd generation partnership project, wideband code division multiple access) system. In random access, a preamble part is usually devised for fast and reliable burst synchronization, which is essential in order to avoid excessive access delay and/or repeated transmissions. A configurable preamble synchronizer to achieve fast and reliable burst synchronization with flexible complexity/performance tradeoffs is proposed and implemented into a real ASIC based on a generic CE array and its peripheral circuits. The chip can be easily configured as active correlators (AC) or matched filters (MF) with programmable numbers of CEs and correlation lengths, etc. Finally, the proposed preamble synchronizer is realized in a 3.3-V 0.35-μm CMOS technology with core area 7.4×7.4 mm2 and power dissipation 483.5/600 mW in MF/AC mode operating at 15.36 MHz.

Published in:

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on  (Volume:2 )

Date of Conference:

25-28 May 2003