A very low-voltage, low-power and high resolution sigma-delta modulator for digital audio in 0.25-μm CMOS

This paper presents a 1.2 V, 1.6 mW and high-resolution sigma-delta modulator for digital audio. It uses a modified low-swing integrator output 4^th order single loop topology. Modulator coefficients have been optimized for higher overload level factor and low power. A low-power two-stage class A/AB OTA with modified common mode feedback (CMFB) circuit in the first stage has been used in the first integrator. For reducing the power consumption, a simple folded-cascode OTA has been used in the last three integrators. Simulation results with an OSR of 100 give SNDR and dynamic range (DR) of 99.5 dB and 107 dB, including the circuit noise in the 25 kHz signal bandwidth, respectively. The circuit is implemented in a 0.25 μm standard CMOS technology.