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The effects of random independent timing jitter in integrating charge sampling circuits are analyzed in the time domain. An analytical expression for the signal-to-noise ratio (SNR) of a simple charge sampling circuit and an approximate formula for the SNR of a multiple charge sampling circuit due to timing jitter are given. Numerical Matlab simulations validating the presented theory are shown in the paper.
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on (Volume:1 )
Date of Conference: 25-28 May 2003