By Topic

Efficient implementation of MPEG-4 video encoder on RISC core

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)

MPEG-4 simple profile video is being used as the video compression standard in mobile video communications. MPEG-4 video requires more computational power because of its high complexity. Currently, RISC cores are widely used in mobile applications because of their low power consumption. Design of fully standard-complaint MPEG-4 video encoder with real time performance on a RISC processor for embedded applications entails optimizations at all levels to the maximum extent possible. This paper describes in detail about the implementation of MPEG-4 simple profile video encoder on efficient RISC processor core requiring 50 Mega Cycles to encode QCIF resolution video at 15 frames per second with minimum processing power and memory requirements.

Published in:

Consumer Electronics, IEEE Transactions on  (Volume:49 ,  Issue: 1 )