Notification:
We are currently experiencing intermittent issues impacting performance. We apologize for the inconvenience.
By Topic

Hardware neuron models with CMOS for auditory neural networks

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Saeki, K. ; Dept. of Electron. Eng., Nihon Univ., Chiba, Japan ; Iidaka, R. ; Sekine, Y. ; Aihara, K.

A number of studies have recently been made on hardware implementation of a neuron model for applications to information processing functions of neural networks. We previously proposed the transfer function which changes the threshold of a pulse-type hardware neuron model (hereafter, "P-HNM") in time according to an output that express feature-detecting cell and a universal-type hardware neuron model using depletion mode MOSFETs (hereafter "D-MOSFETs"), resistors, and capacitors. However, because it is difficult to make D-MOSFETs due to a complicated manufacturing process, they are not usually used in IC implementation. In this paper, we propose hardware neuron models with CMOS for feature-detecting cells of auditory neural network.

Published in:

Neural Information Processing, 2002. ICONIP '02. Proceedings of the 9th International Conference on  (Volume:3 )

Date of Conference:

18-22 Nov. 2002