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Hardware neuron models with CMOS for auditory neural networks

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4 Author(s)
Saeki, K. ; Dept. of Electron. Eng., Nihon Univ., Chiba, Japan ; Iidaka, R. ; Sekine, Y. ; Aihara, K.

A number of studies have recently been made on hardware implementation of a neuron model for applications to information processing functions of neural networks. We previously proposed the transfer function which changes the threshold of a pulse-type hardware neuron model (hereafter, "P-HNM") in time according to an output that express feature-detecting cell and a universal-type hardware neuron model using depletion mode MOSFETs (hereafter "D-MOSFETs"), resistors, and capacitors. However, because it is difficult to make D-MOSFETs due to a complicated manufacturing process, they are not usually used in IC implementation. In this paper, we propose hardware neuron models with CMOS for feature-detecting cells of auditory neural network.

Published in:

Neural Information Processing, 2002. ICONIP '02. Proceedings of the 9th International Conference on  (Volume:3 )

Date of Conference:

18-22 Nov. 2002