By Topic

Effects of gate notching profile defect on characteristic of cell NMOSFET in low-power SRAM device

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

8 Author(s)
Sang-Hun Seo ; Memory Div., Samsung Electron. Co. Ltd., Gyeonggi-Do, South Korea ; Sung-Jin Kim ; Won-Suk Yang ; Jun-Yong Ju
more authors

The effects of gate notching profile defects on transistor performance in cell NMOSFETs of low-power SRAM devices with 0.12 μm channel length were investigated. Experimentally, it was found that gate notching profile defects cause serious degradation of the transconductance and the transistor drive current. TSUPREM4 simulations showed that the degradation of transistor characteristics is related to the penetration of the gate notching into the channel region over the source/drain (S/D) extension region and the rapid reduction of gate electric field. Moreover, we found that the degradation of transistor performance is more sensitive to notch depth than notch height.

Published in:

Plasma- and Process-Induced Damage, 2003 8th International Symposium

Date of Conference:

24-25 April 2003