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Processor-based turbo interleaver for multiple third-generation wireless standards

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2 Author(s)
Myoung-Cheol Shin ; Electr. Eng. & Comput. Sci. Dept., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea ; In-Cheol Park

A software turbo interleaver running on a SIMD processor is presented for a turbo decoder supporting multiple 3G wireless standards. To hide the timing overhead of interleaver changing, the interleaver generation is split into two parts, preprocessing and incremental on-the-fly generation. Applying the proposed approach, we implemented a W-CDMA and cdma2000 interleaver that generates one interleaved address per cycle and occupies 10% area of the ROM implementation.

Published in:

Communications Letters, IEEE  (Volume:7 ,  Issue: 5 )