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In advanced flash-EEPROM devices, the retention time is limited by "moving bit" (MB), "fast bit" or "anomalous cells", which exhibit anomalously large threshold-voltage shift (ΔVT). Since the MB is caused by anomalous charge loss through the tunnel oxide, the characterization of stress-induced leakage current (SILC) in suitable metal-oxide-semiconductor (MOS) capacitor test structures should be useful for determining the responsible mechanism. SILC is too small to measure in a commercial flash memory cell, so large-area capacitors have generally been used to characterize the leakage current. However, since the MB corresponds to the tail portion of the retention-time distribution, the erratic behavior has not been observed in large capacitors. We have therefore used small-area capacitors with thinner oxide for SILC analysis in this study.