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We investigate plasma nitridation conditions for ultrathin nitrided oxide gate dielectric formation to extend the downscaling limit of equivalent oxide thickness (EOT). A high pressure and high gas flow rate process with slot plane antenna (SPA) plasma provides superior EOT reduction without degradation of interfacial properties. Control of the oxygen residence time to suppress oxide growth at the SiO2/Si interface is the key to reduce EOT. Plasma condition of low electron temperature less than 1 eV is essential to prevent mobility degradation. CMOSFETs are fabricated with the high pressure and high gas flow rate SPA plasma nitridation process. The mobility degradation of nMOSFET is only 5% at EOT = 1.1 nm. The mobility of pMOSFET is improved because of the suppression of boron penetration.