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A reconfigurable and hierarchical parallel processing architecture: performance results for stereo vision

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4 Author(s)
Choudhary, A.N. ; Dept. of Electr. & Comput. Eng., Syracuse Univ., NY, USA ; Das, S. ; Ahuja, N. ; Patel, J.H.

A multiprocessor architecture called NETRA is discussed. It is highly reconfigurable and does not involve the use of complex interconnection schemes. The topology of this multiprocessor is recursively defined and is therefore easily scalable from small to large systems. It has a tree-type hierarchical architecture featuring leaf nodes that consist of a cluster of small but powerful processors connected via a programmable crossbar with selective broadcast capability. The architecture is simulated on a hypercube multiprocessor and the performance of one processor cluster is evaluated for stereo-vision tasks. The particular stereo algorithm selected for implementation requires computation of the two-dimensional fast Fourier transform (2-D FFT), template matching, histogram computation, and least-squares surface fitting. Static partitioning of data is used for the data-independent tasks such as 2-D FFT and dynamic scheduling, and load balancing is used for the data-dependent tasks of feature matching and disambiguation

Published in:

Pattern Recognition, 1990. Proceedings., 10th International Conference on  (Volume:ii )

Date of Conference:

16-21 Jun 1990