Referenced Items are not available for this document.
A segmented pipeline architecture for multiresolution, focal, array processing is presented. A buffer is introduced at each point in a pipeline computation at which changes in sample density or analysis area may take place. These buffers divide the pipeline into segments, each with constant data load. When active, a segment runs at its full design rate. Efficiency is maintained by switching processing elements between segments as image data flows through the system. The segmented pipeline architecture is illustrated with an application to image motion analysis
Published in:
Pattern Recognition, 1990. Proceedings., 10th International Conference on
(Volume:ii
)
Date of Conference: 16-21 Jun 1990
- Page(s):
- 305 - 311 vol.2
- Meeting Date :
- 16 Jun 1990-21 Jun 1990
- Print ISBN:
- 0-8186-2062-5
- INSPEC Accession Number:
- 3944520
- Conference Location :
- Atlantic City, NJ
- Digital Object Identifier :
- 10.1109/ICPR.1990.119374
- Product Type:
- Conference Publications
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