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A low-voltage low-power analog memory cell with built-in 4-quadrant multiplication

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2 Author(s)
De Lima, J.A. ; Lab. of VLSI Design & Instrum., Univ. Estadual Paulista, Sao Paulo, Brazil ; Cordeiro, A.S.

An accurate switched-current (SI) memory cell and suitable for low-voltage low-power (LVLP) applications is proposed. Information is memorized as the gate-voltage of the input transistor in a tunable gain-boosting triode-transconductor. Additionally, four-quadrant multiplication between the input voltage to the transconductor regulation-amplifier (X-operand) and the stored voltage (Y-operand) is provided. A simplified 2×2-memory array was prototyped according to a standard 0.8 μm n-well CMOS process and 1.8-V supply. Measured current-reproduction error is less than 0.26% for 0.25 μA ≤ ISAMPLE ≤ 0.75 μA. Standby consumption is 6.75 μW per cell at ISAMPLE=0.75 μA. At room temperature, leakage-rate is 1.56 nA/ms. Four-quadrant multiplier (4QM) full-scale operands are 2xmax=320 mVpp and 2ymax=448 mVpp, yielding a maximum output swing of 0.9 μApp. 4QM worst-case nonlinearity is 7.9%.

Published in:

Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on  (Volume:50 ,  Issue: 4 )

Date of Publication:

Apr 2003

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