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Speculative register promotion using advanced load address table (ALAT)

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4 Author(s)
Lin, J. ; Dept. of Comput. Sci. & Eng., Minnesota Univ., Duluth, MN, USA ; Tong Chen ; Wei-Chung Hsu ; Pen-Chung Yew

The pervasive use of pointers with complicated patterns in C programs often constrains compiler alias analysis to yield conservative register allocation and promotion. Speculative register promotion with hardware support has the potential to more aggressively promote memory references into registers in the presence of aliases. This paper studies the use of the advanced load address table (ALAT), a data speculation feature defined in the IA-64 architecture, for speculative register promotion. An algorithm for speculative register promotion based on partial redundancy elimination is presented. The algorithm is implemented in Intel's open research compiler (ORC). Experiments on SPEC CPU2000 benchmark programs are conducted to show that speculative register promotion can improve performance of some benchmarks by 1% to 7%.

Published in:

Code Generation and Optimization, 2003. CGO 2003. International Symposium on

Date of Conference:

23-26 March 2003