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A fast lock digital phase-locked-loop architecture for wireless applications

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2 Author(s)
Fahim, A.M. ; Electr. & Comput. Eng. Dept., Univ. of Waterloo, Ont., Canada ; Elmasry, M.I.

A fast lock digital phase-locked-loop (PLL) frequency synthesizer for wireless applications is reported. The main advantages of the architecture include small area and digitally selectable frequency resolution. Also, a fully digital solution to reducing the phase lock time is introduced. This work is also supported by a nonlinear analytical analysis of the locking mechanism for PLLs.

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Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on  (Volume:50 ,  Issue: 2 )