In order to pose a successful challenge to conventional processor architectures, reconfigurable computing systems must achieve significantly better performance than conventional programmable processors by both greatly reducing the number of clock cycles required to execute a wide range of applications and achieving high clock rates when implemented in deep-submicron fabrication technologies. In this paper, we describe the architecture of Amalgam, a clustered programmable-reconfigurable processor that integrates multiple conventional processors and blocks of reconfigurable logic onto a single chip. Amalgam's distributed architecture allows implementation at high clock rates by limiting the impact of wire delay on cycle time and delivers an average of 13.7× speedup on our benchmark applications when compared to an equivalent architecture that contains only a single programmable processor.
Published in:
Field-Programmable Technology, 2002. (FPT). Proceedings. 2002 IEEE International Conference on
Date of Conference: 16-18 Dec. 2002