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In an asynchronous CDMA system the first step when a mobile station is switched on is to perform code and time synchronization with the base station. This process of achieving synchronization with the base station is called initial cell search. The code and time synchronization in the cell search process is divided into three stages: (1) slot boundary detection, (2) code group and frame boundary identification, and (3) scrambling code identification. This paper proposes an improved cell search design which uses cyclic codes (Improved CSD) and compares it to the 3GPP cell search design using comma free codes (3GPP-comma free CSD) in terms of a) hardware specifications on a Xilinx Virtex-E FPGA and b) acquisition time measures for different probabilities of false alarm rates. Our results indicate that for a AWGN channel model in a high signal-to-noise ratio environment the Improved CSD scheme requires fewer slots in stage 2 than the 3GPP-comma free CSD scheme. The Improved CSD scheme thus achieves faster synchronization with the base station. At the same time the Improved CSD has a lower equivalent gate count as compared to the 3GPP-comma free CSD for the same length sequences used in stage 2. Hence, our findings indicate that the Improved CSD is a better design as compared to the 3GPP-comma free CSD.