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A simple and fast parallel round-robin arbiter for high-speed switch control and scheduling

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5 Author(s)
Zheng, S.Q. ; Dept. of Comput. Sci., Texas Univ. at Dallas, Richardson, TX, USA ; Yang, Mei ; Blanton, J. ; Golla, P.
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The design of a fast and fair arbiter is critical to the efficiency of the scheduling algorithm, which is the key to the performance of a high-speed packet switch. In this paper, we propose a parallel round-robin arbiter (PRRA) design, based on a binary-tree structure. We show that our design is simpler and faster than existing round-robin arbiter designs.

Published in:

Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on  (Volume:2 )

Date of Conference:

4-7 Aug. 2002