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A reconfigurable analog-to-digital converter (ADC) has been proposed for a mobile terminal. This architecture scales the digital word length (bits) by automatically monitoring desired power and adjacent channel interference power. This leads to power consumption savings, depending on the number of bits used. The architecture can scale between a minimum of 4 bits and maximum of 16 bits. The new reconfigurable ADC was applied to Time-Division-Duplex (TDD) mode of UMTS Terrestrial Radio Access (UTRA) system and results show that this reconfigurable ADC can save up 75 % of the power consumption when compared with the power consumption of a standard 16-bit analog-to-digital converter.
Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on (Volume:2 )
Date of Conference: 4-7 Aug. 2002