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On the feasibility of cascaded single-stage distributed amplifier topology in digital CMOS technology

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3 Author(s)
Worapishet, A. ; Microelectron. Res. Centre, Mahanakorn Univ. of Technol., Bangkok, Thailand ; Srisathit, S. ; Chongcheawchamnan, M.

Feasibility of the cascaded single-stage distributed amplifier (CSDA) structure over the classical distributed amplifier for ultra broadband amplification in CMOS technology is investigated in this paper. A number of unique benefits gained from the CMOS CSDA are highlighted along with some important analysis and helpful design hints. Designed and simulated in standard digital 3.3V 0.35μm CMOS process with realistic parasitic models, a prototype design of a 4-stage CMOS CSDA provides 21dB power gain at 5GHz bandwidth, more than -10dB input/output return loss, larger than -7.3dBm 3rd-order input intercept point (IIP3) and dissipates less than 132mW from a 2.2V power supply.

Published in:

Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on  (Volume:2 )

Date of Conference:

4-7 Aug. 2002