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SEU reliability improvement due to source-side charge collection in the deep-submicron SRAM cell

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2 Author(s)
P. K. Saxena ; Dept. of Electr. Commun. Eng., Indian Inst. of Sci., Bangalore, India ; N. Bhat

The effect of technology scaling (0.5-0.09 μm) on single event upset (SEU) phenomena is investigated using full two-dimensional device simulation. The SEU reliability parameters, such as critical charge (Qcrit), feedback time (Tfd) and linear energy transfer (LET), are estimated. For Lg<0.18 μm, the source node collects a significant fraction of radiation-induced charge resulting in an increase of LET, despite the lower critical charge at the sensitive drain node. The effect of striking location on LET confirms this finding.

Published in:

IEEE Transactions on Device and Materials Reliability  (Volume:3 ,  Issue: 1 )