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A method to estimate slew and delay in coupled digital circuits

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2 Author(s)
S. Batterywala ; Synopsys (India) Pvt. Ltd, Bangalore, India ; N. Shenoy

Coupling capacitance has substantial impact on signal delays and arrival times. It is not always correct to de-couple them using the Miller factors of 0 or 2×. Towards this end, various de-coupling techniques have been studied in the literature. We extend them and suggest their use in static timing analysis. Our approach uses the switching factor based de-coupling approximation idea to compute the impact of coupling capacitors on signal slews and delays. We suggest an iterative table lookup scheme. The slew and delay tables for the library cell elements are looked up to compute slew and arrival times of signals in the presence of coupling capacitors. The method is easy to use with existing static timing analysis tools. It works with slew and delay tables, which are usually available with technology libraries. Other than table lookups, it requires minimal computation of two switching factors per coupling capacitor per iteration. Analysis and HSPICE simulation results are given to support the suggested method.

Published in:

VLSI Design, 2003. Proceedings. 16th International Conference on

Date of Conference:

4-8 Jan. 2003