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Channel width test data compression under a limited number of test inputs and outputs

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4 Author(s)
H. Ichihara ; Fac. of Inf. Sci., Hiroshima City Univ., Japan ; K. Kinoshita ; K. Isodono ; S. Nishikawa

A narrow channel width between a circuit under test and a tester increases the testing time. In this paper, we propose a channel width compression method when the channel width is limited. A given test sequence is partitioned into sub-sequences, whose widths can be compressed under the limited width. Each sub-sequence is compressed and expanded by a proposed dynamically re-configurable circuit located between the circuit under test and the tester. Since the hardware overhead depends on the number of partitions for a test sequence, a procedure to partition a given test sequence into a minimum number of sub-sequences under the channel width limitation is proposed. Experimental results show that our method can compress the width of a test sequence into a half through a quarter with a relatively small number of partitions.

Published in:

VLSI Design, 2003. Proceedings. 16th International Conference on

Date of Conference:

4-8 Jan. 2003