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A novel architecture for lifting-based discrete wavelet transform for JPEG2000 standard suitable for VLSI implementation

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2 Author(s)
Movva, S. ; Dept. of Electr. Eng., Indian Inst. of Technol. Madras, Chennai, India ; SRINIVASAN, S.

This paper presents a novel architecture for the implementation of a 2-D discrete wavelet transform (DWT) for image compression. The architecture is designed for lifting based DWT The advantages of the lifting based DWT and its inverse, IDWT, over the convolution based scheme are lower computational complexity and reduced memory requirements. Hence, the lifting based DWT and IDWT implementations are faster, consume less power and occupy smaller area compared to the implementations based on the convolution scheme. An optimum architecture has been arrived at after conducting a thorough analysis of data interdependencies, lifetime and flow Reduction of scaling coefficient multiplications has also been effected. CSD arithmetic has been incorporated in the architecture in order to speed up the implementation. The hardware has been implemented for the image blocks of size 9×9 pixels based on single sample overlap scheme as recommended in the JPEG2000 standard.

Published in:

VLSI Design, 2003. Proceedings. 16th International Conference on

Date of Conference:

4-8 Jan. 2003