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This paper describes an RF front-end chip-set for ISM band wireless applications. It contains a high power SPDT switch, a low noise amplifier and a power amplifier. A novel design approach has been adapted to carry out the designs to achieve the best possible performance on various parameters like low noise figure, high speed, low insertion loss, good linearity and good power added efficiency. A unique process technology has been identified to realize these conflicting specifications simultaneously. The philosophy of realization of all these designs as cascadable blocks has eased the integration issues as a single chip-set. The novelty of the design is that the MMIC chip can be used for ISM band RF front-end applications and the constituent blocks can be used individually as independent ICs.