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Reverse-order-restoration-based static test compaction for synchronous sequential circuits

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3 Author(s)
Ruifeng Guo ; Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA ; S. M. Reddy ; I. Pomeranz

We present a new static test sequence compaction procedure called reverse-order-restoration (ROR) for synchronous sequential circuits. It improves the efficiency of the basic vector restoration-based compaction procedure by reversing the order of the vectors in the original test sequence. This reduces the number of faults to be resimulated after every restoration step. We extend the ROR procedure to a class of radix reverse order vector restoration procedures. These procedures dynamically increase the number of vectors to be restored in each step and, thus, speed up the vector restoration process. We also investigate techniques to improve the compaction levels achieved by the ROR-based compaction procedure. By combining reverse order vector restoration and vector omission, higher compaction levels are achieved. Experimental results on test sequences generated by several test generators show the effectiveness of the proposed techniques.

Published in:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (Volume:22 ,  Issue: 3 )