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An embedded built-in-self-test approach for analog-to-digital converters

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3 Author(s)
Sheng-Hung Hsieh ; Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan ; Ming-Jun Hsiao ; Tsin-Yuan Chang

In this paper. an embedded built-in-self-test approach for analog-to-digital converters (ADCs) is presented. This architecture can test the parameters of ADC. which includes the differential nonlinearity (DNL) error, integral nonlinearity (INL) error, offset error (VOSE), gain error (VGE), and sampling rate. The proposed circuit is designed and simulated with an 8-bit ADC by using a CMOS 0.35 μm 1P4M process. The accuracy of DNL test, INL test, VOSE test, and VGE test depend on the testing time. For the case of 256μs, the accuracy can achieve 1/10LSB. and longer testing time results in higher accuracy.

Published in:

Test Symposium, 2002. (ATS '02). Proceedings of the 11th Asian

Date of Conference:

18-20 Nov. 2002