By Topic

Efficient VLSI module placement with solution space smoothing

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Sheqin Dong ; Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China ; Xianlong Hong ; Shuo Zhou ; Jun Gu

Due to the rugged terrain surface of the search space of a placement instance, it often is stuck at a locally optimum configuration. In this paper, we propose a solution space smoothing technique for VLSI block placement. A placement instance with the simplest terrain structure is solved first, and the original problem instance with more complicated terrain structure is solved last. The solutions of the simplified problem instances are used to guide the search of more complicated ones. Compared with the simulated annealing algorithm, the solution space smoothing method needs few control parameters and the parameters are easy to determine. Experimental results of MCNC benchmarks show that solution space smoothing is very efficient for VLSI module placement. It can be applied to floorplanning representations, such as BSG, SP, CBL, B*-tree, O-tree, etc.

Published in:

Communications, Circuits and Systems and West Sino Expositions, IEEE 2002 International Conference on  (Volume:2 )

Date of Conference:

29 June-1 July 2002