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Interconnect-aware design methodology for analog and mixed signal design in silicon based technologies using high bandwidth on-chip transmission lines

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3 Author(s)
Goren, D. ; IBM Haifa Res. & Dev. Labs., Haifa Univ., Israel ; Zelikson, M. ; Gordin, R.

This paper discusses a new interconnect-aware AMS design methodology which leads to better designs, and is in many ways superior to the RLC post-layout extraction approach. This methodology uses high bandwidth on-chip transmission lines (T-lines) for critical interconnect. The T-lines have been designed for multi-layered metallization stack high speed silicon based technologies, such as the silicon germanium (SiGe) technology, as well as for high speed CMOS technologies.

Published in:

Electrical and Electronics Engineers in Israel, 2002. The 22nd Convention of

Date of Conference:

1 Dec. 2002